微电子三维封装中互连硅通孔的纳米颗粒掺杂填充机理和工艺研究

Filling of vertically interconnected Through Silicon Via (TSV) is one of the core technologies for achieving three-dimensional (3D) integration of microelectronics. Aiming at the problems of 3D package, such as low filling rate of TSV and mismatch of coefficients of thermal expansion (CTE) between silicon substrate and the copper, etc., this project proposes an innovational method for filling the TSV with copper mixed with nanoparticles: 1) nanoparticles, with thousands of times the diameter of a copper atom, are used to increase deposition current efficiency and nucleation rate, in order to accelerate the electrodeposition process in TSV; 2) the CTE of the nanocomposite material of the TSV is decreased by doping nanoparticles with lower CTE than Cu, therefore the thermal mismatch problem between the silicon substrate and the filler material will be alleviated. In order to realize the above new method, the mechanism of co-deposition of Cu and nanoparticles in the filling process of TSV with multi-additive system is studied. The transport and control mechanisms of nanoparticles during TSV filling process are analyzed. The effects of nanoparticles on the electrodeposition rate and properties of the nanocomposite material are investigated. External field assistances are used to improve the filling process of TSV by co-deposition technology and to control the content of nanoparticles in the nanocomposite layer, that is, optimizing the process parameters of ultrasonic and pulse currents in the co-deposition process. Through the above study, a new method for filling the TSV with high-efficiency and non-defect is developed by doping nanoparticles in the TSV material, providing technical support for the development of 3D packaging.

垂直互连硅通孔(TSV)填充是实现微电子三维集成的核心技术之一。本项目针对微电子三维集成封装中硅通孔电沉积填充速率低、硅铜热膨胀系数失配等难题，提出了掺杂纳米颗粒电沉积填充硅通孔的新思路和新方法：利用直径是铜原子数千倍的纳米颗粒，提高沉积电流效率和形核率，加速电沉积过程；利用热膨胀系数低的纳米颗粒，改变填充材料的热膨胀系数，减轻硅基底和填充材料之间的热失配问题。为实现上述新方法，拟研究在多添加剂体系下纳米颗粒共沉积在硅通孔填充过程中的作用机理，分析纳米颗粒在硅通孔填充过程中的输运和控制机制，查明纳米颗粒对硅通孔中电沉积速率和镀层性能的影响规律，利用外场改善纳米颗粒共沉积填充硅通孔过程、调控纳米颗粒在硅通孔填充材料中的含量，优化超声和脉冲电流在纳米粒子电沉积填充硅通孔中的工艺参数，形成掺杂纳米颗粒的高效无缺陷硅通孔改性填充新方法，为微电子三维封装的发展提供技术支撑。

先进电子产品的IC封装不仅要求多功能芯片间高品质互连以提高信息传输的效率，更需要芯片在有限空间中的高密度分布。以硅通孔（Through Silicon Via，TSV）互连为核心的三维集成封装是解决低效率信息传输和低空间利用率的最优途径，也是提升器件性能和性价比的必然选择。但是，硅通孔互连结构在制造及服役中仍面临严峻的挑战：一方面，在制造过程中为了避免形成孔洞、缝隙等微孔填充缺陷，往往以牺牲填充速率作为代价，导致硅通孔制造成本高，硅通孔质量难以保障；另一方面，由于微孔填充料与硅衬底之间较大的热膨胀系数失配，引起互连结构热失效等可靠性问题，亟需改善硅通孔填充材料热、力、电学等性能。针对以上问题，本项目利用纳米颗粒和铜的复合共沉积进行硅通孔的快速改性无缺陷填充制备，探索硅通孔电沉积填充速率在纳米颗粒和添加剂的多方面协同作用下显著的提高的方法，研究添加剂CTAB对电镀共沉积中粒子表面修饰的机理以及其对微孔填充的抑制作用和机理，调整和探索工艺参数对共沉积镀层无缺陷填充以及粒子含量的影响，提出TSV微孔纳米共沉积的两步法填充法。通过上述工作的完成，实现了对硅通孔内电沉积材料的优化改性，减低硅通孔填充材料的热膨胀系数，改善铜硅热膨胀系数失配带来的硅通孔互连可靠性问题，为微电子三维封装、微机电系统等相关方向的发展提供有力的技术支撑。..