众核处理器片内资源利用率和能效优化研究

"Power Wall" is critical to scalability and performance of many-core architecture, and it has been a fatal challenge to processor design. The newly high throughput Internet applications, such as social network, are one of the most important fields for modern computing systems, which is correlative to our daily life closely. The typical characteristics of such high throughput Internet applications are interactive request driven, and discrete data fields accessing in a large memory address space concurrently. The execution mode results in severe collision of shared module frequently, and lower effective utility rate of on-chip hardware resources and then wasting energy. It has become a critical limit to many-core processor's performance improvement and architecture scalable. Aimed at the above problem, we are going to propose an energy-aware on-chip hardware resource management policy via catching time-varying request of on-chip hardware resource and energy dynamically, which will use on-chip resources efficiently under the constraints of energy consumption. There are three points in our research. Firstly, for difficult to distill characteristics of application's demands of on-chip hardware resources and energy, we are going to research how to reduce feature dimensions of clustering method via iterative optimization, so that descript and analyze demand characteristics of such applications. Secondly, for difficult to predict application's dynamic demands of on-chip hardware resources accurately, we are going to research how to describe application's demands of on-chip hardware resources and energy in a optimization model via game theory, which will be resolved by linear programming, so that predict application's time-varying demands of on-chip hardware resources and catch the dynamic time-varying characteristics of resource request. Thirdly, for difficult to manage on-chip hardware resources with the prediction results of time-varying energy demand, we are going to research how to allocate on-chip shared hardware components in different applications and thread scheduling algorithm et al, and propose a hardware and software cooperative resource management policy, which can optimize on-chip hardware resource's effective utility rate dynamically based on time-varying energy demand, so that reduces conflict accesses and improve performance in the constraint of power.

功耗墙是众核处理器结构扩展和性能发挥的极大挑战。新型网络应用是现代计算系统的最重要应用之一，其三个动态时变特征，即高通量需求、大地址空间的离散访问、交互式请求驱动的执行模式，导致众核芯片内共享资源竞争严重，资源有效利用率的降低使能耗问题更为突出。针对此问题，本课题将通过捕捉特征的动态时变规律，研究感知能耗需求的片内资源管理方法，在功耗约束下实现片内资源的高效利用。主要研究内容包括：（1）需求特征提取：通过迭代优化，研究特征降维的聚类方法，分析新型网络应用对片内资源和能耗的时变需求特征；（2）时变需求精确预测：利用程序的需求特征，通过博弈论方法，研究精确预测片内资源和能耗动态时变需求的方法，捕捉需求特征的动态时变规律；（3）软硬件协同管理：利用能耗和片内资源的时变需求预测，通过片内资源动态分配和线程调度技术，研究片内资源有效利用率的动态优化方法，减少资源竞争访问，实现功耗约束下的性能提升。

项目执行过程中，针对新型网络应用的三个动态时变特征，即高通量需求、大地址空间的离散访问、交互式请求驱动的执行模式，所带来的众核芯片内共享资源严重竞争、资源利用率和能耗等问题，从应用程序的特征分析、硬件微结构利用率分析、结合应用程序特征的硬件资源管理机制等方面进行研究。在应用程序特征分析和对硬件资源的时变需求、硬件资源管理和运行时动态分配、兼顾硬件资源利用率和能耗效率的多目标优化体系框架和模型、大规模并行众核处理器体系框架优化模型和微结构研究，以及大规模并行高通量众核处理器模拟平台取得重要进展。项目实施过程中，主要参与人员在IEEE JSAC等顶级国际期刊和PACT、ICDCS等顶级国际会议发表论文24篇，其中SCI国际期刊3篇、国际学术会议17篇、国内顶级期刊4篇；申请发明专利6项。培养研究生5名。项目负责人及主要参与者，获得省部级奖励1项。本项目的研究成果，对于缓解由于功耗墙所造成的众核处理器结构难以扩展和性能难以发挥的问题，具有重要的科学意义。