绝缘体上锗(GOI)纳米带应变调控机理及其MOSFET研究

Germanium-on-insulator (GOI) nanobelt (/nanowire) is one of the promising materials for short-channel MOSFET　due　to its many advantages including high carrier mobility and low leakage current with buried insulator. It is also generally used for the study of physical effect of nanostructures. In this project, we propose to fabricate GOI nanobelts by local oxidation of SiGe stripes on SOI substrates. The mechanisms to introduce strain on GOI nanobelts and the modification of the strain with Si-compatible technology will be investigated systematically. The strain in GOI nanobelt is expected to be modified during the fabrication and post treatment processes, such as selective oxidation of the patterns defined by etching and depositing dielectrics, post-deposition stress lines, as well as some novel methods. The high crystal quality GOI nanobelts with large compressive strain will be fabricated. After that, the influence of strain, interface state density, and quantum confinement effect on the carrier mobility of GOI nanobelts will be studied with tailoring energy band structures. Atomic layer dielectrics to passivate surface states of GOI nanobelts will be optimized with plasma-enhanced atom layer deposition methods. The Ge nanobelt multi-gates Schottky barrier metal- oxide- semiconductor field effect transistor (SB-MOSFET) will be fabricated and characterized with high effective carrier mobilities.

绝缘体上锗（GOI）纳米带兼具Ge高载流子迁移率和SOI材料的优点，是制备短沟道MOSFET的优选材料，也是研究纳米尺度物理效应的重要载体。项目提出局域氧化SOI衬底上SiGe条形结构制备GOI纳米带，着重研究在GOI纳米带中引入应变的物理机理及其调控方法。通过局域氧化过程中绝缘介质与Ge相互作用、尺寸效应、介质应变传递以及NiGe合金等与硅工艺兼容技术的研究，构建调控GOI纳米带应变类型和大小的模型。解决GOI纳米带制备过程中纳米尺度引起的氧化自限制效应及尺寸和应变分布不均匀性问题，制备出压应变可控的高质量GOI纳米带。在此基础上，采用等离子原子层沉积（PEALD）方法探索GOI纳米带表面钝化的新方法，研究应变、界面态以及量子限制效应对GOI纳米带沟道材料能带结构改性及其载流子输运特性的影响。制备出高K介质多栅结构GOI纳米带肖特基源漏结MOSFET，获得高的有效载流子迁移率和开关比。

绝缘体上锗（GOI）由于其具高的载流子过移率等优点，是特征尺寸已进入纳米时代的高性能集成电路重要的候选材料之一。项目围绕GOI纳米线及其MOSFET器件的制备，重点开展了三个方面的研究工作。一是优化改进氧化SiGe制备GOI纳米带的方法，提出温度渐变代替两步温度锗浓缩方法提高GOI纳米带的结晶质量和均匀性。研究纳米带中应变的产生机理和调控方法，基于模拟结果，通过沉积氧化硅、氮化硅等应变层和制备微结构实现对GOI纳米带应变的较大范围内调控。二是研究高K介质与锗界面态钝化及金属与锗接触势垒高度调控机理，实现低的栅界面态密度和好的欧姆接触。三是设计模拟了GOI纳米带MOSFET器件。采用锗浓缩技术制备的GOI纳米带制备出MOSFET器件。在课题的资助下发表学术论文25篇，其中被SCI收录23篇。