Through silicon via (TSV) technology and micro-bump interconnect are key techniques for 3D chip stacking integration, which can meet the requirements of the increasing miniaturization, high density, multi-function and high-performance computing of integrated circuits and electronic devices. However, the protrusion and intrusion of TSV copper filler and their interaction with micro-bump joints have serious influence on the reliability of the interconnect structure. This project aims to systematically investigate the behavior of protrusion and intrusion of TSV copper filler and its interaction with micro-bump solder joint under electro-thermo-mechanical coupling fields as well as their influences on the reliability of interconnects, through experimental characterization, coupled phase field and finite element simulation methods, as well as theoretical analysis. The focus will be placed on revealing the physical characteristics, solid- and liquid- metallurgical process mechanism of microstructural evolution and property degradation of micro-bump joints constrained by TSVs under multiple fields; understanding the fundamental trends of the influence of the interaction mode and intensity between TSVs and micro-bump joints on microstructural evolution, properties and reliability of interconnects; establishing the thermodynamic model of joint melting and predictive models for evaluating the electromigration property and fatigue lifetime of micro-bump joints; developing the reliability assessment methodology for micro-bump interconnects under complex service conditions. It is expected that the above studies will provide theoretical background for structural layout optimization of three-dimensional electronic packages and for prediction of properties of interconnects, and offer a theoretical guide for reliability and durability assessment of three-dimensional electronic packaging structures and systems.
硅通孔(TSV)技术和微凸点互连作为三维芯片集成封装的关键可实现集成电路和电子器件微型化、高密度化、多功能化和高运算能力的要求,但服役过程中TSV填充铜柱发生显著胀出和缩进并与微凸点焊点交互作用而严重影响互连结构可靠性。本项目拟以实验研究为主并结合相场法和有限元模拟及理论分析,系统地研究电-热-力耦合场作用下TSV铜柱胀缩行为及其与微凸点焊点之间的交互作用特性以及对互连可靠性的影响,阐明微焊点在耦合场下受TSV约束时组织演变和性能退化的物理本质及固(液)相冶金机理;掌握TSV与微凸点焊点之间交互作用方式和强度对互连结构组织和性能变化及可靠性影响的规律,建立计及两者交互作用特性的微焊点超前熔化热力学模型、电迁移性能和疲劳寿命预测模型,发展出TSV-微焊点互连结构在复杂服役条件下的可靠性评价方法,为三维封装结构布局优化和性能预测提供理论依据,并为三维封装结构系统可靠性和耐久性评估提供理论指导。
本项目针对集成电路三维封装中硅通孔(TSV)为代表的微互连结构在制造和服役过程中因填充铜柱发生胀缩并与微焊点交互作用而严重影响封装可靠性,不同构造和尺度的微焊点受电-热-力场作用而发生显微组织变化甚至出现物相分离而影响焊点力学性能和可靠性,以及TSV技术制造的多层芯片高带宽存储器(HBM)结构中铜柱和微焊点在多物理场作用下可靠性不明等若干重要科学问题,综合采用了理论分析、实验和数值模拟的方法对上述问题进行了系统研究。主要研究内容包括:多物理场及耦合下TSV铜柱胀缩行为及其与微凸点焊点间交互作用规律,微焊点中电-热迁移行为及物相分离导致的焊点物理和力学性能变化,微焊点显微组织不均匀性导致局部低温熔化及其对焊点性能和可靠性的影响,微焊点显微组织和力学性能的尺寸效应,以及由多芯片TSV单元组成的3D封装系统(如HBM)在不同物理场作用下铜柱与微凸点焊点相互作用行为及其对封装可靠性影响的规律。研究获得的一系列具有先进性和创新性的结果包括:揭示了铜晶粒结构取向各向异性、铜晶粒形貌与热-力行为的强烈交互作用是引起铜胀出和TSV界面剥离的本质原因;首创建立了模拟实际应用条件的多物理场耦合加载实验系统,阐明了微焊点显微组织和力学行为变化的尺寸效应机理;揭示了微焊点低温熔化现象源于界面IMC晶粒不均匀性导致电流拥挤和焦耳热效应而引发局部剧烈温升;多芯片TSV结构不同层级铜柱和微焊点中电流密度不均匀分布与塑性变形能力差异导致HMB结构底层芯片微焊点失效风险高。本项目所获得的研究进展和丰富结果使我们对TSV为代表的微互连结构在多物理场作用下可靠性的认识提升到了一个新高度,为三维集成电路TSV技术铜填充工艺优化、微凸点和高性能界面设计、回流工艺改进和高密度封装系统可靠性评价提供了重要的理论指导,对今后多芯片堆叠结构(如HBM)设计、制造工艺优化、可靠性评估和寿命预测具有重要的指导作用和参考价值。
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数据更新时间:2023-05-31
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