新型无结(Junctionless)多晶硅薄膜晶体管的研制及其关键问题的研究

On-state current is an important device electronic parameter of the poly-Si thin-film transistors which controls the optical state of each pixel in active-metrix addressing displays. Improvements on on-state current is essentially important for the realization of high resolution and hiqh quality dispalys.Techical methods have been proposed and demonstrated to improve the field-effect mobility of the poly-Si thin-film transistors for an improved on-state current.Differently, this project will realize the improvement of the on-state current through a new way by investigating of a novel junctionless poly-Si thin-film transistor device.The channel poly-Si is of the same doping type and concentration as the source and drain regions. Thus,all the carriers in the channel will be the involved in the on-state current conduction,because of which, surface scattering effects to the degradation of carrier mobility is much reduced, which is instinctively defferent from conventional devices. So the on-state current of junctionless transistor can be increased by orders of magnitude with this method.Technical processes will be optimized for the effective dopant activation in the channel poly-Si,high-k gate dielectric materials and double-gate structure will be used to improve the subthreshold characteristics of the poly-Si thin-film transistor. The operation mechanism during the subthreshold region and turn-off region will be discovered, analysis of the stability issue of this new type device under electrical stress will be conducted and the physical model for the devices under electrical stress will also be established.

开态电流是多晶硅薄膜晶体管应用于有源选址显示像素电路的一个重要器件参数，大幅提高开态电流是实现高清晰高画质显示的必要条件。传统方法是通过工艺手段提高薄膜晶体管的场效应迁移率来达到提高器件开态电流的目的,本研究将通过改变器件结构来实现开态电流的大幅增加。本项目将研制一种新型无结多晶硅薄膜晶体管器件，晶体管的沟道为重掺杂的多晶硅且与源漏区具有相同的杂质类型和掺杂浓度。一方面由于无结型薄膜晶体管的整个沟道内载流子均参与导电，另一方面由于在新器件中表面散射造成的载流子迁移率下降的影响将减弱，所以新型器件的开态电流可以实现数量级幅度的提高。无结器件的关闭是通过耗尽整个沟道内载流子来实现的。本项目将通过工艺的优化来实现沟道内杂质的有效激活，利用双栅结构和高介电常数绝缘层改善新型器件的亚阈值区特性，揭示新型器件的关闭及亚阈区工作机理，并对其在电应力下的稳定性进行测试分析，建立电应力下性能衰减的物理模型。

随着有源矩阵平板显示技术的发展，多晶硅薄膜晶体管和氧化物半导体薄膜晶体管广泛应用于有源矩阵平板显示基板的像素电路或外围驱动电路中，工艺简单、高性能、高可靠性的薄膜晶体管技术逐渐成为科研人员的追逐目标。在本项目的开展过程中，我们首先利用金属诱导结晶技术制备低温多晶硅，研究了掺杂和结晶诱导孔间距等因素对多晶硅形貌的影响，并提取了金属镍在非晶硅中的扩散系数，研究成果有助于建立科学准确的金属诱导结晶物理模型；研究了多晶硅薄膜晶体管在动态栅应力作用下的退化规律和退化机制后，我们提出并验证了延长峰值脉冲时间或通过第四端向沟道注入少数载流子的办法可以有效抑制薄膜晶体管的动态退化，研究成果具有实际应用价值；制备了以导电的氧化物半导体为有源层材料的无结型薄膜晶体管，分析了其电学特性，解释了其工作的物理机制并研究了这类器件的电学应力可靠性，为进一步优化高开态电流、低关态电流无结型薄膜晶体管器件设计和制备奠定了基础。