硅基InGaAs双栅MOS器件及可靠性研究

Scaling high performance integrated circuits beyond the 10 nm technology node is facing major challenges. To explore a new approach for extending Moore’s Law, high-speed low-power high mobility CMOS transistors and reliability of new structure devices will be systematically studied in this proposal. More specifically, in-depth studies will be carried out in five areas: carrier transportation, band-to-band tunneling, high-k dielectrics and MOS interface, reliability issues introduced by new materials and new structures, as well as the corresponding physical mechanisms in nanoscale high mobility CMOS transistors. Critical scientific issues involved in high mobility CMOS devices are expected to be solved based on multi-level experimental design from microelectronics perspective. Through implementation of this study, multiple innovations with independent intellectual property rights will be delivered. An international research team will be built and well trained. Nanoscale InGaAs double-gate NMOS with a VDD below 0.5 V will be developed. Main physical mechanism of high mobility CMOS reliability will be clarified. These achievements will bring the research of high mobility CMOS technology into massive production. In addition, more than 10 SCI articles are expected to be published and at least 5 patents will be applied.

针对10nm节点以下高性能集成电路所面临的重大技术挑战，以探索延展“摩尔定律”新途径为导向，开展高速低功耗高迁移率CMOS新结构器件及其可靠性的研究。通过对纳米尺度高迁移率CMOS器件所涉及的载流子输运、带带隧穿效应、高k介质与界面、新材料新结构对器件可靠性的影响及其相应的物理机制等共性问题进行深入研究，从微电子学角度多层次、综合性地解决关键科学问题，取得一批自主知识产权的前沿性成果，培养和建立一支国际水平的科研队伍，研制出工作电压低于0.5 V、纳米栅长硅基InGaAs双栅MOS器件，掌握高迁移率CMOS器件可靠性的主要物理机制并提出改进方法，实现高速低功耗硅基高迁移率InGaAs器件与原型电路的突破，推动硅基高迁移率CMOS技术的研究、应用与发展。发表SCI论文10篇以上，申请发明专利5项以上。

高迁移率CMOS的研究在材料、器件、硅基异质集成以及可靠性等方面都取得了显著的进展，硅基高迁移率CMOS技术的已经在低电压工作、高速、低功耗等方面显现出巨大的优势。本项目针对InGaAs MOSFET新结构器件及其可靠性开展研究，系统地研究了关键科学问题，取得了一批拥有自主知识产权的前沿性成果，研制出低电压工作高性能InGaAs NMOS双栅器件，掌握了InGaAs MOS器件可靠性的物理机制并提出改进方法，为高迁移率CMOS技术的应用与发展奠定了基础。.提出了适于InGaAs MOS器件的量子阱沟道材料结构与器件结构，在建立MOS器件流体力学物理模型的基础上，采用TCAD工具进行模拟仿真验证和优化设计，在异质结能带工程的基础上建立一套设计新结构器件的新方法。获得了高速低功耗InGaAs双栅MOS器件结构的优化设计，并采用MBE技术生长了高迁移率InGaAs沟道材料。.采用原子层沉积（ALD）方法在InGaAs、InP等半导体表面生长高k栅介质，获得低缺陷密度、高击穿电压的栅介质材料；采用化学钝化、界面控制层、热处理等方法降低MOS的界面态，获得了低滞回电压、低频散的InGaAs MOS结构；开发了InGaAs 双栅MOS的关键器件工艺，研制出纳米栅长InGaAs双栅MOS器件。开展了栅氧化层TDDB的可靠性研究，分析了栅介质缺陷与界面态对InGaAs MOS器件可靠性的影响及其物理机制。.项目实施四年来，在项目负责人与中科院微电子所项目组成员的共同努力下，取得了一系列创新性的研究成果，全面完成了预期的任务目标。