铁电阻变存储器的研究

Ferroelectric resistance switching random access memory (FeRRAM) is based on the bipolar switching between high- and low-conductance of a ferroelectric diode on two opposite polarizations to realize logic “0” and “1”. The reading voltage is very low for FeRRAM (Vread<1V), which is associated with a drastic reduction of the static power consumption for reading process. Furthermore, so low reading voltage will not change the polarized state of the memory cells, leading to one that the non-destructive readout of the binary information is possible. Important properties of such memory are the ultrafast operating speed depending on the polarization flipping time. The I–V curve of ferroelectric resistance switching exhibits diode-like conduction to prevent internal parasitic circuit in crossbar arrays of devices, which makes the application of large passive crossbar array architectures feasible. However, Despite the significant advancement so far, practical implementations of large-scale high-performance FeRRAM arrays and architectures still post significant challenges, as a set of performance metrics in terms of the super-high ROFF/RON, how to affect the ferroelectric resistance switching for the ferroelectric domain, the relation of cycling endurance and ferroelectric fatigue need to be obtained in the same device system..In the project, we present a systematic study on the FeRRAM to resolve the above issues. The oxide heterostructures consisting of oxide semiconductor/dielectric and ferroelectric layers as switch cells as switch cells allow the role of each layer and interface on the switching characteristics. The super-high ROFF/RON can be obtained by the accumulation and depletion processes of carriers and the tunneling effect of dielectric layer. And the ferroelectric fatigue and the leakage will be restrained. The stripe domains comprising either 109o or 71o domain boundaries have been fabricated by choosing the growth conditions. In situ observation of the change of domain in switching process is realized by the combining of C-AFM and PFM to obtain how to affect the ferroelectric resistance switching for the ferroelectric domain. The relation of cycling endurance and ferroelectric fatigue will be revealed by designing the ferroelectric films with various ferroelectric fatigues to realize super-high cycling endurance.

铁电阻变存储器是基于不同的极化态下，铁电薄膜的电阻不同来实现0和1的存储。其在读取过程中只需要很小的电压，读取能耗低；而且不会破坏存储单元的极化状态，属于非破坏性读出。铁电翻转速度非常快，所以铁电阻变存储器的读写速率非常快。铁电阻变具有二极管整流性，抑制了Crossbar结构中的内部寄生回路，提高集成密度。但是铁电阻变存储器在实际应用中，有几个关键问题亟待解决，包括铁电阻变的存储窗口较小、微观机制不清楚以及铁电疲劳和阻变可擦写次数的关系。本项目主要解决这三项关键问题。运用氧化物半导体以及介电薄膜和铁电薄膜的异质结作为存储器单元，通过电荷积累和隧道效应来提高存储窗口，改善铁电疲劳和漏电等。制备出周期条状畴结构的铁电薄膜，结合C-AFM和PFM，原位观察阻变过程中畴结构的变化，获得畴翻转对铁电阻变的作用。通过调节铁电疲劳来揭示铁电疲劳和阻变可擦写次数的关系，实现超高可擦写次数的铁电阻变存储器。

铁电阻变存储器是利用铁电薄膜在不同的极化方向下，具有不同的电阻来存储数据。铁电阻变存储器集合了铁电材料的优势，避开了铁电存储器的缺点，具有很大的应用前景。本项目中我们通过PLD沉积技术，制备了高质量的PbZr0.2Ti0.8O3(PZT)铁电外延薄膜，选择不同Sr掺杂浓度的La1-xSrxMnO3体系作为电极。通过铁电极化对电极导电性的调控，随着Sr的掺杂浓度的降低，阻变窗口越来越大，当x=0.15的时候达到了最大值，大约为10E7。通过对比不同电极结构的铁电极化，发现铁电极化没有明显的差异，再结合高低阻态的随着掺杂浓度的变化，巨大ROFF/RON主要源自于铁电极化对电极的调控作用，尤其对于接近于LSMO金属绝缘体转变点附近的成分具有更大的调控作用，从而实现了巨大的存储窗口。另一方面，铁电阻变存储器的参数相比于离子迁移性的阻变存储器具有更好的稳定性，更加有利于其的应用。