纳米集成电路中石墨烯互连线的建模方法与特性研究

With the feature size scaling into nanometer regime, the effective resistivity of Cu interconnects increases dramatically due to the increased surface and grain scatterings, resulting in serious performance degradation and reliability problems. Compared to conventional conductive materials, graphene possesses many unique physical properties. More importantly, it is CMOS compatible and can be handled by standard planar technology. Therefore, graphene has been proposed as a promising candidate for interconnect applications. ..However, the multilayer graphene nanoribbon (MLGNR) cannot be utilized directly for forming global interconnects. It is worth noting that one novel scheme, Cu-graphene heterogeneous interconnect, has been proposed recently. In this project, the MLGNR and Cu-graphene heterogeneous interconnects are used for local/intermediate and global levels, respectively. ..The detailed research contents are given as follows. Considering the quantum transport, substrate doping and interlayer coupling effects, circuit modeling as well as precise characterization of multi-scale graphene interconnects will be performed. The contact resistance between metal electrode and graphene interconnects will be calculated accurately. The fast parameter extraction method will be developed. The proposed circuit model will be used for capturing the static/transient physical responses. The electrical and thermal performances of graphene interconnects will be obtained and compared with those of conventional Cu interconnects at different technology nodes. The impacts of process parameter variations on the signal transmission characteristics will be evaluated. The coupling effects between multiple graphene interconnects will be studied, with the shield insertion employed for suppressing the noise voltage. Further, we propose to develop various optimization techniques to effectively improve the performance and reliability of graphene interconnects from different prospectives. The goal of this project is to provide some theoretical guides for the development of nanoscale integrated circuits.

本项目围绕纳米集成电路中传统铜互连线面临的性能极限难题，利用石墨烯优良的物理特性和易于与CMOS兼容的优点，在充分考虑工艺可实现性的基础上针对局部/中间层和全局层分别构造多层石墨烯纳米带互连线和新型铜-石墨烯异质互连结构。具体研究包括：结合量子输运、衬底掺杂和层间耦合等效应，针对引入接触电极效应的多尺度石墨烯互连线开展器件行为表征和模型研究，发展参数快速提取方法；精确预测石墨烯互连线的稳态和瞬态物理响应特性，计算时延、功耗等电、热性能并与在不同节点与同尺度铜互连线进行比较分析，研究边缘粗糙度、费米能级、温度等物理和几何参数变化对信号传输特性的影响；针对多根平行耦合石墨烯互连线开展电路建模，研究串扰、时序等信号完整性问题，采用屏蔽线插入等技术抑制噪声电压；开展石墨烯互连线优化设计理论与方法的研究，从不同角度探索可有效改善其电、热性能及可靠性的技术途径，为纳米集成电路的发展提供理论指导和依据。

互连线是芯片系统中单元电路间、模块内和多芯片组件间的信号传输载体。随着集成电路特征尺寸不断缩小，传统铜互连线的有效电阻率急剧增大，导致信号衰减和波形畸变等问题出现，严重影响到系统电、热性能。本项目针对以石墨烯为代表的新型碳纳米互连技术，在充分考虑工艺可实现性的基础上，针对中间和全局互连层分别构造碳纳米互连和铜-碳纳米互连结构。本项目提出了竖直石墨烯纳米带（GNR）互连结构。研究表明，当边缘散射系数为0.8时，竖直GNR互连时延比铜互连小，但水平GNR互连的时延仍高于铜互连，因此竖直GNR互连对边缘质量要求更低。此外，水平GNR互连会阻碍竖直方向上的散热，而竖直GNR互连可有效缓解集成电路散热压力，这对于未来纳米尺度单片三维集成电路的应用至关重要。进一步地，本项目提出采用耦合碳纳米互连传输差分信号，同时考虑到不同模式（即电压和电流模式信号），建立了等效电路模型并使用商业仿真软件进行验证。进一步地，比较分析了工艺参数波动对互连线时延的影响。考虑到碳纳米材料工艺水平仍存在不足，本项目提出采用将铜和碳纳米材料结合起来，构造铜-碳纳米新型互连结构。采用石墨烯作为铜互连线的阻挡层，以提升有效导电面积，并构造了铜-石墨烯互连的等效单导体传输线模型，迭代计算了等效量子电容和等效动电感，分析了时延、带宽等电学性能，并分析了静电放电脉冲注入到铜-石墨烯互连中的电-热响应。针对全局互连层发展铜-碳纳米管混合互连技术，采用等效复电导率计算接触电阻、散射电阻、电感和电容参数，分析了碳纳米管动电感变化对相对稳定性的影响，并研究了多根平行耦合铜-碳纳米管混合互连中的串扰效应。最后，本项目针对碳纳米互连发展了缓冲器插入技术。在充分考虑到接触电阻的影响下，采用多变量曲线拟合技术推导碳纳米互连中插入缓冲器的最优尺寸和最优数目，并通过商业仿真软件进行验证。本项目从不同角度探索改善集成电路互连电、热性能及可靠性的技术方案，为下一代集成电路的发展提供有力理论指导。