含串并转换功能的片上集成光收发器研究

Based on the strategic demands of low-power consumption large-scale data movement in the future high performance computing and data centers, an on-chip integrated optical transceiver with serializing/deserializing (SerDes) function is studied with the modular design method. The goal is to achieve the bidirectional direct transformation between 20 2GHz parallel digital signals and a 40GHz serial optical signal based on time-interleaving technology, and to provide high-speed optical interface for next generation high end chip. This project realizes the independent of the optical-electrical conversion from the power-hungry SerDes circuit, releases the modulation frequency restriction of high speed serial signals, reduces the power consumption in the data movement, increases the export bandwidth of the information processing chip, and makes the optical-electrical conversion no longer be the bottleneck between the information processing and information transmission. In this project, the optical characteristics, electrical characteristics and opt-electrical characteristics of the basic optical elements constituted the optical transceiver are modeling to realize the simulation and modular design of integrated optical circuit. Further, the proposed scheme is compatible with various kinds of optical multiplexing technologies, such as wavelength division multiplexing, quadrature phase-shift keying and polarization-division multiplexing, and thus it has great potential to enhance the bandwidth even higher.

面对未来高性能计算以及数据中心中对大规模数据交换的重大战略需求，紧密围绕低功耗、温度不敏感与可集成这些光收发器件的设计要求，以模块化设计方法展开对含串并转换功能的光收发集成芯片的研究。采用分时技术在芯片层级实现20路2GHz并行电信号和40GHz串行光信号之间的直接转换，为下一代高端芯片提供高速光接口。本项目方案摆脱了光电转换对高功耗SerDes电路的依赖，解除高速串行电信号对调制频率的限制，降低信息传输过程中的功耗，并提升信息处理芯片出口带宽，使光电转换不再成为信息处理和信息传输之间的瓶颈。本项目对构成光收发器的基本光学元件在电气特性、光电特性和光学特性方面建立模型，在元件模型的基础上对整体器件进行仿真设计，初步实现集成光路的模块化设计。本项目所提方案兼容波分复用、正交键控调制和偏振复用等光学复用技术，能进一步提高的端口带宽。

面对未来高性能计算以及数据中心中对大规模数据交换的重大战略需求，紧密围绕低 功耗、温度不敏感与可集成这些光收发器件的设计要求，以模块化设计方法展开对含串并转换功能的光收发集成芯片的研究。本项目对构成光收发器的基本光学元件在电气特性、光电特性和光学 特性方面建立模型，在元件模型的基础上对整体器件进行仿真设计，初步实现集成光路的模块化设计。设计实现了一种新型的低功耗的带串并转换功能的光收发模块，作为下一代的芯片信号接口，实现并行电信号与超高速串行光信号之间的双向直接转换，避开高传输损耗的高速电信号，采用分时技术在芯片层级实现了4路25GHz并行电信号和 100GHz串行光信号之间的直接转换，结合暗调制技术进一步在芯片层级实现了5路25GHz并行电信号和 125GHz串行光信号之间的直接转换。降低信 息传输过程中的功耗，并提升信息处理芯片出口带宽，使光电转换不再成为信息处理和信 息传输之间的瓶颈。相比同类普通4*25Gbps复用到单路100Gbps信道的功耗（包括SerDes和驱动放大电路）27pJ/b，本项目所提方案实现4*25Gbps复用到单路100Gbps信道的链路整体功耗仅为10.3pJ/b，或38%。