降低碳化硅(SiC)器件封装寄生参数关键技术研究

In order to fully develop the high frequency capability of wide band-gap silicon carbide(SiC) device, and solve the problem of large package parasitics for commercial sic power devices, we will base on the theoretical model of packaging parasitics and silicon carbide, researching the key technology of reducing the parasitics of the novel hybrid package for SiC device. In order to overcome the drawbacks of existing hybrid packaging technology, we first propose a new method to reduce packaging capacitor, and integrate the EMI filter into the novel hybrid package. Moreover, using the high thermal conduction direct bonding copper (DBC) and flex PCB, innovative DBC+DBC and DBC+Flex PCB 3D packaging structure are proposed, which further reduce the packaging parasitics, improve the thermal performance, and increase the power density of silicon carbide devices. Eventually, based on the optimization and integration method of the novel hybrid package, a 1200V/100A low packaging parasitics silicon carbide device sample can be fabricated, applying the available packaging equipment, material, and processes. Meanwhile, the theory of multiple hybrid packaging structures can be approved by the measurements of electrical parameters, thermal resistance, and double pulse test. This subject will promote the development of high frequency applications for silicon carbide devices.

为充分发挥宽禁带碳化硅(SiC)器件的高频特性，解决目前商用碳化硅功率器件封装寄生参数过大的问题，本课题拟基于封装寄生参数与碳化硅芯片的理论模型，研究新型混合封装的优化设计及集成方法。针对现有混合封装集成技术的不足，提出了降低封装寄生电容的方法，并将EMI滤波元件集成于新型混合封装结构中，以有效抑制高频EMI干扰；另外，利用直接敷铜陶瓷板(DBC)的高导热性和柔性PCB技术的可弯曲性，创新性的提出了DBC+DBC和DBC+柔性PCB的新型3D混合封装结构，以期进一步降低封装的寄生参数，提高散热封装的性能，提高碳化硅器件的功率密度。基于上述新型混合封装的优化设计及集成方法，利用现有的封装设备、材料及加工工艺制作低寄生参数的1200V/100A碳化硅器件样品，并通过电参数、热阻及双脉冲测试对多种混合封装结构优化设计理论进行实验验证。通过对本课题的研究，为碳化硅器件的高频化应用奠定基础。

本项目以降低碳化硅器件封装寄生参数为目标，研究了多种新型混合封装降低寄生电感的设计方法，基于这些混合封装结构设计并加工了1200V/120A碳化硅半桥功率模块，通过各种测试对多种混合封装结构的设计理论进行实验验证。形成了系统的低寄生参数碳化硅器件的封装方法，对碳化硅器件的封装应用具有指导意义。