量子隧穿SOI器件的隧道效应机理及模型研究

Owing to the fully dielectric isolation, SOI technology is attractive features for the high-speed and low-power operation CMOSFET’s. Despite these advantages, SOI devices are not widely used by circuit or system designers. The main concern is the floating body effects (FBE) in partially depleted (PD) SOI MOSFETs. The quantum tunneling SOI devices of the project proposed by applicant can efficiently suppresses the FBEs. The quantum tunneling SOI devices have many advantages, such as economize area, without parasitic effects, applied to NMOS and PMOS, without limiting the width of the channel, the production process and entirely conventional CMOS processes compatible. The main content of this project are as follows: ① Based on the WKB（Wentzel-Kramers-Brilloui）hypothesis，get the tunneling current of the quantum tunneling SOI devices. ② Based on the carrier transport theory of SOI MOS devices, established the carrier transport theory of quantum tunneling SOI devices. ③ Establishment and validation of a unified SPICE model of the quantum tunneling SOI devices. ④ Achieve the process control and optimization of the quantum tunneling SOI devices. The Implementation of this project will be beneficial to fully grasp the carrier transport theory of the quantum tunneling SOI device, and take further advantage of SOI technology..

SOI器件采用全介质隔离，能实现高速低功耗应用，由于PD SOI的浮体效应，导致SOI技术并未被广泛应用。项目申请人提出的量子隧穿SOI器件能有效抑制浮体效应：节省面积，不增加寄生效应，抑制浮体效应的效果适用于NMOS和PMOS，不受沟道宽度的限制，制作工艺与传统CMOS工艺完全兼容。本项目对量子隧穿SOI器件的隧道效应机理进行深入研究：①基于WKB（Wentzel-Kramers-Brilloui）假设，求解量子隧穿SOI器件源区隧道二极管隧穿电流；②结合MOS器件载流子输运理论，建立量子隧穿SOI器件的载流子输运理论；③建立统一的量子隧穿SOI器件SPICE模型，利用测试数据，验证器件量子隧穿SOI器件SPICE模型；④实现量子隧穿SOI器件的工艺控制和优化。通过本项目的研究，旨在全面深入的掌握量子隧穿SOI器件的载流子输运理论，进一步发挥SOI技术优势。

本课题基于0.13微米PD SOI工艺开展了量子隧穿（TDBC）SOI器件及模型研究。量子隧穿SOI器件能有效抑制浮体效应：节省面积，不增加寄生效应，抑制浮体效应的效果适用于NMOS和PMOS，不受沟道宽度的限制，制作工艺与传统CMOS工艺完全兼容。对量子隧穿SOI器件的隧道效应机理进行了深入研究。基于WKB（Wentzel-Kramers-Brilloui）假设，求解量子隧穿SOI器件源区隧道二极管隧穿电流，建立了隧穿二极管模型。结合MOS器件载流子输运理论，建立量子隧穿SOI器件的载流子输运理论。建立统一的量子隧穿SOI器件SPICE模型，利用测试数据，验证器件量子隧穿SOI器件SPICE模型。找到了最优化的量子隧穿SOI器件的工艺。本课题的研究，将为量子隧穿SOI器件的电路应用提供基础，进一步发挥SOI技术优势。项目资助发表论文5篇，申请3个专利。培养硕士生1名，培养博士生2名。项目投入经费24.00万元，支出23.13万元，各项支出基本与预算相符。剩余经费0.87万元，剩余经费计划用于本项目研究后续支出。