薄膜界面特性对多层膜纳米光栅线宽粗糙度的影响

The precise measurement of the nanoscale linewidth is one of the core technologies for the large scale integrated circuit. The measuring instruments, like scanning electron microscope, etc., have intrinsic measurement errors, and they must be calibrated by the nanosclae length transfer standards to precisely determine the value of the nanoscale linewidth. The multilayer gratings are mainly used as length transfer standards whose length is less than 50 nm. The linewidth accuracy of the multilayer grating is mainly dependent on the line width roughness (LWR). The large scale integrated circuit requires that the LWR must be less than 4% of the linewidth. The interfacial characteristics of multilayer have the biggest influence on the LWR of multilayer grating. Previous studies focused on the interfacial roughness but neglected the contribution from the interfacial diffusion layer. Without a comprehensive understanding of this issue, the LWR of multilayer gratings is still not low enough to meet the requirement of 14 nm length transfer standard. A new solution is proposed here to investigate the influence of both interfacial diffusion layer and interfacial roughness on the LWR of multilayer grating. By controlling the fabrication parameters, the dependence of LWR on the interfacial diffusion layer and interfacial roughness is studied in isolation, which helps to find the direction for material selection and process optimization. Then the fabrication process is optimized to control the interfacial diffusion layer and interfacial roughness simultaneously. With the optimal fabrication parameters that lead to the minimized LWR, the 14 nm multilayer grating transfer standard is prepared.

纳米级线宽尺寸的精确表征是大规模集成电路的核心技术之一。扫描电子显微镜等测量工具均存在误差，需使用纳米级长度传递标准校正，才能精确测定线宽尺寸。50nm以下长度传递标准主要使用多层膜光栅。多层膜光栅的线宽精度取决于线宽粗糙度的大小，大规模集成电路要求线宽粗糙度小于线宽的4%。薄膜界面特性是影响多层膜光栅线宽粗糙度的关键因素，已有研究主要关注薄膜界面粗糙度的影响而忽略了薄膜界面扩散层的作用，认识不够全面；降低多层膜光栅线宽粗糙度的研究遇到了瓶颈，至今仍未能实现14nm多层膜光栅传递标准。本项目提出了综合考虑薄膜界面扩散层和界面粗糙度对多层膜光栅线宽粗糙度影响的新思路。通过制备工艺控制，孤立因素，分别研究界面扩散层和界面粗糙度对多层膜光栅线宽粗糙度的影响规律，明确薄膜材料选择和制备工艺的优化方向。探索综合控制界面扩散层和界面粗糙度的光栅制备技术，降低线宽粗糙度，研制14nm多层膜光栅传递标准。

纳米级线宽尺寸的精确表征是大规模集成电路发展的核心技术之一。随着集成电路关键尺寸不断向亚十纳米尺度演进，亟需同步研制对应尺度的纳米线宽标准物质结构对扫描电子显微镜等测量工具进行误差校准从而为关键尺寸测量提供量值溯源。以多层膜光栅为主流线宽研制技术由于未综合考虑薄膜界面粗糙度与扩散层的影响，导致14nm及以下尺度的线宽标准物质研制遭遇瓶颈。基于此，本研究项目以研制线宽为14nm多层膜光栅传递标准为目标，开展了多层膜光栅技术中薄膜界面粗糙度和扩散层对线宽线边缘粗糙度的综合影响规律和协同控制方法研究，实现了项目预设的极低线边缘粗糙度的14nm线宽多层膜光栅结构的研制的目标。项目的特色研究成果有：（1）总结了多层膜线宽线边缘粗糙度的非对称特征，并基于此分析了界面粗糙度与扩散层对线边缘粗糙度对的协同作用机制与可控制备方法；（2）优选多层膜光栅材料对，优化薄膜沉积参数，将Si/SiO2光栅的线边缘粗糙度降低至仅0.12nm，并探索了高深宽比与均一稳定光栅结构的制备工艺；（3）全局优化光栅沉积、胶合切割、研磨抛光与湿法刻蚀等关键工艺，研制出线宽为14nm的多层膜光栅结构，并积极筹备申报国家标准物质。本项目执行期间均按研究计划实施，已经完成研究预设目标，所取得研究成果深化了多层膜光栅制备工艺中界面粗糙度与扩散层对线边缘粗糙度作用机理的认识，积极推进了14nm纳米线宽标准的研制与结构精细化，为更小尺度纳米线宽的研制与半导体器件关键尺寸表征提供了重要的标准物质参考。