面向可靠性和安全性的集成电路物理设计算法研究

As the very large scale integrated (VLSI) technology advances into 22nm regime, electromigration (EM) caused by the shrinking feature size and increasing load current becomes more and more serious and has been considered to be the major reliability issue for current and future VLSI technology; hardware attack such as side-channel attack (SCA) has emerged as a threat to VLSI, which is the foundation of information system. The security and reliability of VLSI is facing a great challenge. It has become a hot topic need to be resolved in the VLSI design field. In order to improve the security of VLSI, this topic will make a research on the safety evaluation method and design flow on the early stage of VLSI design. Based on the relationship between noise and power analysis attacks of power network (P/G), an optimization method for power network design flow will be proposed to improve the ability of chip resistance to SCA. An EM-aware routing algorithm will be studied base on the eletromigration model to improve the reliability of signal nets. Furthermore, we will also develop an EM-aware design flow and optimization method for power network which could improve the chip reliability and extend the chip lifetime. This research is very valuable both on theoretical and practical, it will provide theory and algorithm support for the security and reliability of VLSI design.

集成电路工艺进入22nm以下，芯片特征尺寸缩小，电路工作电流增大，导致金属电迁移现象凸显，成为芯片可靠性设计的瓶颈；作为信息系统基础的集成电路面临旁路攻击等硬件安全的威胁。集成电路设计的安全性和可靠性问题面临巨大的挑战，是业界研究和亟待解决的热点问题。本课题针对集成电路设计安全性问题，深入研究供电网络（P/G）的噪声与功耗分析攻击的关系，从集成电路物理设计和优化入手，对供电网络进行设计优化，提高芯片抵御旁路攻击的能力，并研究在芯片设计早期阶段的安全性评价方法和设计流程，提高设计安全性；针对集成电路设计的可靠性问题，深入研究互连线的电迁移问题，从建立电迁移的算法模型入手，研究考虑电迁移的物理布线算法；针对电迁移现象在供电网络中更加严重的问题，研究考虑电迁移的供电网络物理设计优化方法，提高芯片的可靠性和生命周期。课题将为芯片设计安全性和可靠性提供理论和算法支撑，具有重要理论研究和实用价值。

随着集成电路工艺进入纳米阶段，大规模集成电路设计与分析更加复杂，伴随着集成电路技术进步和广泛应用，芯片安全性和可靠性问题日益凸显。本课题重点研究和探讨了纳米工艺下集成电路设计中的芯片安全和可靠性问题，课题围绕纳米工艺下金属电迁移的建模、快速分析和可靠性优化，集成电路旁路攻击、硬件木马等信息安全等问题开展了研究，提出和建立了一系列大规模集成电路设计安全性和可靠性设计的分析、验证和优化方法，包括：电磁辐射旁路攻击的抵御方法、信息泄露的硬件木马检测的安全断言自动生成技术、基于信息流追踪的高层次木马检测算法、基于博弈论的RTL级硬件木马检测方法、供电网络噪声和电迁移同时优化的方法、考虑热效应的供电网络通孔电迁移的分析和优化算法、基于规则的考虑电迁移的布线算法，等等。本课题在以上算法研究的基础上，完成了软件原型的开发并通过实例测试。通过本课题的研究工作和取得的成果，为纳米工艺下的集成电路安全性和可靠性设计提供了理论、方法和算法原型，进而为集成电路设计EDA软件工具开发打下了理论和算法基础。