射频超导腔失效补偿机制及硬件实现初步研究

RF superconducting cavities are widely used in large-scale accelerators such as Accelerator Driven Sub-critical System (ADS). Yet the state of the art in superconducting RF technology is indeed not reliable enough to envisage an operation of the ADS accelerator. Due to the nature of the ADS operation, it is needed to have beam failures at the rate several orders of magnitude lower than usual performance of similar accelerators. To achieve this extremely high performance reliability requirement, the accelerator needs to implement, to the maximum possible extent, a fault-tolerance strategy that would allow beam operation in the presence of most of the envisaged faults that could occur in its beam line components, and in particular rf cavities’ failures, and a compensation mechanism to cope with hardware failure, mainly RF failures of superconducting cavities, will be in place. Because of the high logic complexity, extremely tight timing constraints, and mostly important, high flexibility and short turnaround time due to varying operation contexts, the hardware implementation of the mechanism poses high challenges. We will investigate the hardware implementation of the scheme using Field Programmable Gate Array (FPGA) and fast electronic devices. In order to achieve the goals of short recovery time and flexibility in compensation algorithms, an advanced hardware design methodology including high-level synthesis will be adopted. Preliminary experiment results on ADS injector I, a 10MeV proton linac at IHEP will be used to verify the validity of the mechanism and the hardware implementation.

射频超导技术目前已成为大型加速器的主流技术和未来发展方向，应用广泛。然而，由于技术复杂、难度大，在超导加速器中，射频超导腔失效是最主要和常见的故障类型，也是影响加速器可靠性的一个关键因素。相比于其它加速器， ADS的强流质子超导加速器因应用的特殊性，对可靠性的要求最高，因而针对ADS加速器可靠性的课题——“射频超导腔失效补偿研究”显得尤为重要。本项目提出通过调整正常工作超导腔的RF相位及场强的补偿办法，对超导腔失效的补偿机制进行仔细研究；同时，因硬件在不同运行情况下的快速适应需求很高，以及控制的复杂度和时序限制，此补偿机制的硬件实现难度很高。本项目将采用包括高层次综合在内的先进硬件设计方法，通过使用可编程门阵（FPGA）器件和快电子电路，对此补偿机制的硬件实现进行初步研究。此外，本项目将利用高能所ADS注入器I进行超导腔失效补偿的实验研究，以对相关的理论和技术进行进一步的检验和完善。

超导腔相比于普通的常温腔，具有许多突出的优点，如更高的品质因数、更高的加速梯度等，适应了我们对加速元件越来越高的要求。不管是什么腔型的超导腔，由于超导态的环境条件的严苛，均可能会受到各种各样的因素的影响而无法在超导态正常工作（失效）。因此，对超导腔的失效原因和补偿机制进行系统研究，对减轻超导腔失效危害，提高加速器可靠性极为重要。本项目在深入研究超导腔失效机理及常规超导腔失效补偿方法——“查表法”的基础上，提出了一种新颖的超导腔失效补偿方法——“硬件在线补偿法”，即通过FPGA硬件计算实现束流动力学中超导腔失效补偿和重匹配；同时，基于C-ADS注入器I实验平台，通过对该平台中关键元件以及空间电荷效应的多项式模型等效、高层次最优解搜索算法硬件实现等手段对该在线补偿法的可行性进行了成功的验证，并掌握了相关的关键技术。