基于硅工艺的太赫兹芯片级倍频链技术研究

Traditional terahertz multiplier chain solid-state circuits are realized by hybrid integrated method. More than one multipliers are needed from microwave band to THz band. So the hybrid integraed multiplier chain circuits have disadvantages of complex structure, large size, poor machining accuracy, and debugging difficuilt. To solve the above problems, the silicon technology will be introduced into the terahertz frequency multiplier chain circuit design in this project. The silicon technology is not only high integration and low power consumption, but has the potential to be integrated into a single chip, which is called SOC, with base band digital signal processor circuits. The cutoff frequency of schottky barrier diode (SBD) devices are much higher than that of MOS devices in the same silicon process conditions. The cutoff frequency of MOS devices are about 100GHz, while the cutoff frequency of SBD devices are as high as 2THz in the 0.13μm Si CMOS process. The use of SBD devices will greatly enhance the operating frequency of the silicon monolithic integrated circuit. This project will research the silicon-based SBD devices optimized and efficient modeling methods, as well as the key circuits of the terahertz multiplier chain chip, and explore the design method for single-chip terahertz frequency multiplier chain. The results of this project can provide theoretical support for the single-chip terahertz frequency multiplier chain design.

传统固态太赫兹倍频链电路采用混合集成电路方式实现，从微波频段倍频至太赫兹频段，需要多级倍频，电路结构复杂、体积大、加工精度差、调试工作量大。为解决以上问题，本项目将着手把硅技术引入太赫兹倍频链电路设计中，硅技术不仅具有集成度高、功耗小等优点，并且还有与后端基带数字信号处理器集成到一块芯片成为SOC的巨大潜力。在同种硅工艺条件下，肖特基势垒二极管（SBD）器件的截止频率远高于MOS器件，以0.13μm 硅CMOS工艺为例，其MOS器件截止频率约为100GHz，而SBD器件截止频率则高达2THz，SBD器件的运用必将大大提升硅基单片集成电路的工作频率。本项目将研究硅基SBD器件优化和高效建模方法，以及倍频链芯片中的关键电路在太赫兹频段的特性，探索适合倍频链芯片的设计方法。本项目的顺利实施将为太赫兹倍频链芯片设计提供有效的理论支撑。

传统固态太赫兹倍频链电路采用混合集成电路方式实现，从微波频段倍频至太赫兹频段，需要多级倍频和驱动放大模块，电路结构复杂、体积大、加工精度差、调试工作量大。为解决以上问题，本项目把硅技术引入太赫兹倍频链电路设计中，研究将太赫兹倍频链的多个单元电路集成到一个芯片上，为最终实现全集成化的硅基太赫兹收发前端奠定了基础。随着硅工艺进步，器件栅长不断缩小，在硅衬底上实现太赫兹倍频链电路已成为可能。本项目主要研究内容和成果包括：1.对于硅基有源器件版图进行深入研究和重新设计，以最大限度降低器件的外围寄生参数，从而提升器件的fmax频率，并在此基础上采用参数提取和电磁场仿真相结合的方法，精确计算器件的寄生和分布参数。2.对硅基片上无源结构进行深入研究，利用硅基的多层电路结构，构建了屏蔽接地共面波导、高频微波balun等关键无源电路，通过有效屏蔽衬底影响，极大提升无源电路性能。3.对硅基高效倍频技术进行研究，在硅衬底上构建了毫米波二倍频单元和太赫兹三倍频单元，采用平衡式构架，有效抑制倍频产生的谐杂波，同时提升倍频单元输出功率。4.对硅基驱动级功率放大技术进行研究，采用cascode结构，有效提升功放的输出功率。5.对倍频链芯片的一体化技术进行研究，利用多种工艺设计G波段6次倍频链和9次倍频链。6.对G波段放大单片进行研究，完成了器件的小信号建模和两级放大单片设计。7.对新型毫米波和太赫兹片上过渡电路进行研究，并设计了一种集成片上过渡结构的太赫兹放大单片。