Graphene has rashly been acclaimed as the perfect material for ultrafast high performance transistors and designated as the successor of Si in mainstream electronics. Despite graphene’s remarkable electronic properties, the lack of an electronic bandgap severely limits its potential to fabricate field effect transistors for application in digital electronics. A key issue for graphene is to open a gap of 0.4 eV or larger with defined size with a reliable approach compatible to standard semiconductor processing. One of the option is to form narrow graphene nanoribbons (GNRs). The objectives of the project are targeted at using the epitaxial graphene on silicon carbide substrate (SiC) as the channel materials. The theoretical and experimental research will be undertaken on nano-etching technology of graphene on SiC using helium ion beam in a focused ion beam system (FIB). The formation model will be established. The optimal method on graphene nanoribbions (GNRs) fabrication will be introduced by helium ion beam nano-etching technique in FIB. Thin film of yttrium is used as dielectrics buffer layer and yttrium oxide is used as gate dielectric film. We will realize the direct growth of high quality dielectrics on the surface of GNRs to achieve conformal interfaces with the minimal interface defect density. The interface between source-drain electrodes and GNRs is further investigated. The work function between electrodes and graphene nanoribbons is adjusted to be matched. The contact resistance between the electrodes and graphene nanoribbons will be reduced. Then the top-gated graphene nanoribbon field-effect transistor (GNRFET) patterning technique, compatible to the current CMOS fabrication processing, will be elucidated. The GNRFET fabrication model will be demonstrated and the performance measurement of GNRFET will be presented. The work of this research will shed new light on top-gated FET design in digital electronics application. The results will improve the development of excellent performance GNRFET with low power consumption, good reliability and high on/off current ratio.
为石墨稀打开能隙同时保留很高的载流子迁移率,并用于研制适用于逻辑电路的场效应晶体管一直是很重要的课题。本项目以碳化硅衬底外延生长的石墨烯为沟道材料,开展在聚焦离子束系统(FIB)中氦离子对碳化硅外延的石墨烯进行刻蚀加工理论与实验研究,构建相关加工模型,提出FIB系统中氦离子刻蚀技术制备石墨烯纳米带(GNRs)的最优方法,探讨边界化学修饰对GNRs电学性能的可控性调制。以超薄金属钇作为介质缓冲层,氧化钇作为栅介质层,实现在GNRs表面直接生长高质量高介电常数顶栅介质,进而研究源漏电极与GNRs之间的界面,调控电极与纳米带之间的功函数匹配,降低金属源极(漏极)与GNRs间接触电阻,以此形成与CMOS工艺相兼容的顶栅石墨烯纳米带场效应晶体管(GNRFET)制造方法,完成GNRFET性能测试。构建GNRs阵列可控制备及顶栅GNRFET制造的核心技术,研究成果对于GNRFET的进一步发展有重要意义。
场效应晶体管是微处理器和半导体存储器等超大规模集成电路中最重要的器件,为石墨稀打开带隙同时保留很高的载流子迁移率,并用于研制适用于逻辑电路的场效应晶体管一直是很重要的课题。本项目针对石墨烯纳米带(GNRs)可控制备及其场效应晶体管制作开展理论和实验研究,实现了在聚焦离子束系统(FIB)中氦离子对石墨烯进行刻蚀加工,获得具有光滑边缘结构的石墨烯纳米带(GNRs),并以此为晶体管沟道材料,制备了石墨烯纳米带场效应管(GNR-FET),探究了GNR-FET输出转移特性,并借助蒙特卡洛仿真模拟了FIB刻蚀GNRs过程分析离子刻蚀机制,揭示了离子散射对GNRs电学性能的影响。从而构建了氦离子对GNRs的影响机制和加工制备模型,实现了在石墨烯纳米带表面直接生长高介电常数顶栅介质,降低晶体管阵列的界面电荷间陷阱态密度,提高了晶体管的迁移率和饱和电流密度,形成了完善的GNRFET芯片设计方法。同时开展了不同衬底结构的石墨烯场效应晶体管电学性能及击穿特性分析,探讨了离子辐照对单层石墨烯力学及电学性能影响,揭示了离子辐照对石墨烯场效应晶体管磁滞现象的作用规律,为离子束系统下离子刻蚀技术在石墨烯器件中的加工提供理论基础;探寻了微纳米集成加工工艺,自上而下可控裁剪石墨烯,实现了尺度精确可控的纳米电子学器件制造,形成了与CMOS工艺相兼容的顶栅石墨烯纳米带场效应晶体管(GNRFET)制造方法,完成了GNRFET性能测试,构建了GNRs阵列可控制备及顶栅GNRFET制造的核心技术,研究成果对于GNRFET的进一步发展有重要意义。
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数据更新时间:2023-05-31
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