The development of monolithic power transformer technology is the key for the miniaturization, integration, and cost reduction of high voltage isolated signal and power transfer solution. Currently only Analog Devices, Inc. commercialized monolithic power transformers in their products. However, their transformer has a very low inductance/resistance (L/R) ratio of 0.01μH/Ω,and consequently requires a high operating voltage of 170MHz to obtain an acceptable transformer efficiency of 70%. Such a high operating frequency results in significant switching and rectifying losses in the circuit, and leads to an overall efficiency of only 34%.In our previous research, novel monolithic power transformers with embedded coils have been demonstrated. L/R ratios of over 0.20μH/Ω were achieved, and over 70% transformer efficiencies were realized at a low operating frequency of 10 MHz. However, the isolation capabilities demonstrated were below 1.1 kV. Therefore, in this project, research and innovation will be carried out regarding silicon substrate doping structure, thick oxide isolation layer fabrication technology, transformer device structure, and substrate material. Based on the embedded coil technology, novel monolithic power transformers with an N+P-N+ silicon substrate isolation structure, with ultra-thick oxide isolation layers, with a primary-embedded stacked configuration, and with a glass substrate will be designed and experimentally demonstrated, so that high performance monolithic power transformers with 2.5kV isolation and 70% efficiency at 10MHz can be achieved. This project is essential for the development of on-chip high voltage isolation technology and passive device integration technology.
单芯片功率变压器是实现小型化、集成化、低成本高压隔离信号和功率传输的关键。目前仅ADI公司推出产品,其电感/电阻比仅0.01μH/Ω,需170MHz高频以取得70%变压器效率,导致电路高频损耗严重,整体效率仅34%。申请人前期开发的新型单芯片功率变压器基于嵌入式金属布线技术将电感/电阻比提高到0.20μH/Ω,在10MHz低频实现70%变压器效率,但隔离能力未超过1.1kV。因此,本项目将从硅衬底掺杂结构、厚氧化硅隔离层制备工艺、变压器器件结构和衬底材料四个方面进行研究和创新,基于嵌入式金属布线技术,完成具有N+P-N+硅基耐压结构的新型变压器、具有超厚氧化硅隔离层的变压器、新型初级嵌入式叠置型变压器、新型玻璃基变压器的设计优化和实验展示,最终实现2.5kV隔离能力、10MHz、70%效率的高性能单芯片功率变压器研制。本项目对片上高压隔离技术和无源器件集成技术的发展具有重要意义。
无源集成是后摩尔时代集成电路的重要发展方向。变压器需要在隔离初级侧电路和次级侧电路之间高共模电压的同时实现跨隔离屏障的信号和功率传输,是无源集成领域的一个难点。基于变压器的隔离式小功率传输在工业控制、新能源汽车、光伏储能、通信电源、电力计量、航空航天等领域具有广泛的应用需求。单芯片功率变压器是实现小型化、集成化、低成本高压隔离功率传输的关键。目前仅美国ADI公司推出产品级单芯片功率变压器,使得隔离电源系统尺寸显著减小(50倍以上),但其变压器电感/电阻比仅0.01μH/Ω,在170MHz高工作频率下才能达到70%的变压器效率,电路高频损耗严重,系统功率传输效率仅为34%。项目团队前期开发的单芯片功率变压器基于嵌入式金属布线技术将电感/电阻比提高到0.20μH/Ω,在10MHz低工作频率下实现70%变压器效率,但隔离能力仅1.1kV。因此,本项目从硅衬底掺杂结构、厚氧化硅隔离层制备工艺、变压器器件结构和衬底材料四个方面进行了进一步研究,提出了N+P-N+硅基耐压结构、基于多层多晶硅沉积氧化的超厚氧化硅隔离层制备工艺、初级嵌入式叠置型变压器器件结构、玻璃衬底耐压器件结构等多项创新,并成功完成了工艺开发实现了样品制备。实验结果显示,N+P-N+硅衬底掺杂结构的额外引入可将MOSOM结构隔离能力提升0.39kV,2μm氧化多晶硅隔离层的额外引入可将双面硅嵌入式变压器的隔离能力提升0.79kV(+75%),而基于20μm平面聚酰亚胺隔离层的初级嵌入式叠置型变压器器件结构和基于200μm玻璃衬底耐压的变压器器件结构均可实现6kV以上的隔离能力。本项目研制的初级嵌入式叠置型变压器在实现6kV以上产品级隔离能力的同时,在10MHz-20MHz的低工作频率下实现了78%-84%的变压器效率,为目前报道的最高值,并被成功应用于一种新型漏感谐振反激式隔离电源。本项目的上述成果具有巨大的应用前景。
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数据更新时间:2023-05-31
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