The traditional general-DSP manufacturers have been impacted by the emerging enterprises in recent years. Taking the cell phone chip market as an example, Texas Instruments Inc. and STMicroelectronics Inc. have already been ejected, and Qualcomm Technologies Inc. and Media Tek Inc. are occupying most of the market. Meanwhile, Chinese corporations have also begun to break the ice in this field. This phenomenon is closely related to the popularization and channel complexity of the 4G wireless communication protocol. We can also infer that the architecture of DSP will be facing a remarkable transformation under the demand engine of the 5G wireless communication protocol, the new generation of video coding standard, the Internet of thing and et al. And the DSP research institutions and enterprises in China are facing with a very good corner overtaking opportunity. Wide vector architecture is an important direction for the future development of DSPs. The parallel memory unit, whose real data bandwidth is critical to the system’s performance, is an important part of wide vector DSPs. And as the vector width increases, the parallel memory unit will play a more important role. This project, aiming to the parallel memory technique in wide vector DSP, will carry out the following three topics. The first is newly parallel memory scheme with low area cost. The second is the vector memory access and shuffling fusing technique for FFT-like algorithms. And the third is the conflicts reducing technique among the several types of the parallel memory accesses. The techniques of this project will ease the vector access problem’s restrictions to the performance of the wide vector DSPs, and provide the reserve for the new generation innovative DSP of China.
近年来,传统的通用DSP厂商不断受到新兴企业的冲击。以手机芯片为例,德州仪器、意法半导体已经退出该市场,高通、MTK大行其道,中国企业也开始在这一领域打破坚冰。这一现象是和4G无线通信协议的普及和频段复杂性紧密相关的。可以预测,在未来的5G无线通讯、新一代视频编码、物联网等需求的牵引下,DSP体系结构也将面临着深刻的变革,我国DSP研究机构和企业面临着一个非常好的“弯道超车”机会。“宽向量架构”是未来DSP体系结构发展的重要趋势。并行存储部件是宽向量架构DSP的重要组成部分,其数据供给能力对系统性能的发挥起着非常关键的作用,并随着向量宽度的增加而愈发重要。本项目针对宽向量架构DSP高效并行存储技术展开研究,拟在低面积开销的新型并行存储方案、面向类FFT算法的向量访存混洗融合技术和面向多路向量访存请求源的冲突缩减技术三个方面上寻求突破和创新,从而缓解向量访存问题对宽向量架构DSP性能的限制。
数字信号处理器(Digital Signal Processor,DSP)是微处理器领域中的三驾马车(CPU、GPU和DSP)之一,也是构建我国自主可控信息系统的重要阵地。长期以来,国内的DSP处理器和IP核市场一直被TI、ADI、Tensilica、CEVA、高通等欧美企业垄断。近年来,尽管国产DSP已经出现并取得了一些成果,但欧美企业的垄断格局依然没有改变。随着5G无线通讯、新一代视频标准、物联网、云计算等应用需求的不断推动,DSP的体系结构也将面临着变革和创新。如何把握这次“弯道超车”机会,是摆在国内DSP研究机构和企业面前的课题。“宽向量技术”潜在的高功效性和嵌入式应用的需求具有天然的契合性,当前国内外的研究机构和企业均将“宽向量架构”作为未来DSP体系结构发展的重要方向而展开研究。并行访存部件作为宽向量架构DSP的重要组成部分,其并行数据带宽供给能力对系统性能的发挥起着关键的作用,并随着向量宽度的增加而愈发重要。本课题在本单位“十一五”期间的“核高基”项目的基础上,对宽向量架构DSP中的并行存储技术展开研究,从2017年至今3年时间,进行了一些突破和创新。课题形成的成果发表了论文和专利、并且在本单位的DSP上得到了较好的应用。
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数据更新时间:2023-05-31
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