产品测试和BIST环境下数模混合信号集成电路频谱测试与数据处理的理论和算法研究

As the integration level of systems increases and the operation frequency becomes higher, due to the limited accessible internal nodes,clock jitter and signal integrity, it becomes extremely challenging to test the spectral performance of the deeply embeded mixed-signal integrated circuits using conventional methods. This project targets at solving the three challenges in the spectral testing of mixed-signal integrated circuits, such as the non-coherency between the input signal and sampling clock, the distortion due to the clipped input signal and jitter testing. The major goal of this project is to develop some cost-effective mixed-signal integrated circuits spectral testing strategies that can be used in both production test and Built-in Self Test (BIST) applications. In the production test applications, the major goal is to reduce the cost of the test equipments so that less expensive equipments can be used and to reduce the testing time of the device under test (DUT). A secondary goal is to provide test solutions for the highest-end parts in which the DUT exceeds the test capabilities of the best available commercial test equipment. The expected theories and algorithms in this project would be computationally efficient and are suitable for on-chip implementation，and hence provide some practical solutions for on-chip spectral testing.

随着系统集成度的增加和工作频率的提高，由于有限的可供访问的内部节点、时钟抖动和信号完整性等因素的影响，传统的方法在测试这些深嵌在SoC内部的混合信号集成电路的频谱性能时已变得异常艰难。本项目旨在解决混合信号集成电路频谱测试所面临的三大挑战:输入信号与采样时钟的非相干性问题、输入信号的削波失真问题和抖动测试问题，并探索出既能适用于产品测试又能适用于内建自测试环境的低成本混合信号集成电路频谱测试方法。产品测试方面，首要目标是降低测试仪器的成本，以使测试过程中可采用便宜的仪器，同时缩短单个被测器件的测试时间；其次是为高性能混合信号集成电路的频谱测试提供切实可行的解决方案，以解决现有的商用仪器无法测试当今高性能混合信号集成电路产品的问题。本项目预期的方法应具有计算高效和易于片上实现的特点，从而为片上频谱测试提供切实可行的解决方案。

随着半导体工业的持续发展，数模混合信号集成电路的性能日益提升，其频谱性能测试变得更加艰难。传统的测试方法已无法胜任当前产品测试和BIST环境下数模混合信号集成电路频谱测试任务。因此，探索一些低成本、高精度、且易于片上实现的新的频谱测试方法具有重要的意义。.本项目围绕混合信号集成电路频谱测试面临的三大难题：输入信号与采样时钟的非相干性问题、抖动测试问题和信号源的非线性问题展开了深入研究。为消除单音和多音频谱测试中的非相干性问题，本项目提出了两种无需相干采样的频谱测试算法；为精确地分离抖动和噪声，本项目基于抖动被输入信号斜率调制这一性质，提出了两种基于单频测量的抖动与噪声分离技术；为降低混合信号集成电路频谱测试对输入信号源精度的要求，本项目提出了一种基于多路滤波技术的频谱测试算法。上述方法均已通过严格的理论推导和仿真验证，部分方法已通过实验验证。本项目所提出的方法彻底解决了产品测试和BIST环境下当前数模混合信号集成电路频谱测试中的三大难题，大幅降低了产品测试成本，并为BIST环境下的数模混合信号集成电路频谱测试提供切实可行的解决方案。.本项目共发表论文5篇，其中SCI期刊论文4篇，国际会议论文1篇，申请发明专利4项，另有3篇SCI期刊论文在投。培养博士生1人，硕士生5人。