Flip-chip (FC) technology has already become the mainstream in the electronic packaging industry. The electrical and thermal performance of gold bump thermosonic Flip-Chip interconnects is 10 times higher than the reflow Flip-Chip, in addition to the process being simple and environment friendly. From these properties, the gold bump thermosonic Flip-Chip has shown its unique prospects and technical advantages. While gold is the well known material in this process, copper, however, has better electrical performance, whose conductivity is twice as high as gold, and costs is 5-10 times less. Thus copper bump Flip-Chip interconnect technology will become the inevitable choice for the development of high-performance electronic packaging in the future..There are, however, some deficiencies which can potentially cause a bottleneck for development of copper bump Flip-Chip interconnect technology, i.e., the hardness of copper is higher than gold, which requires twice as much load to be applied for interconnection. This means the process could potentially damage chip and welding joints, and eventually result in failure of the interconnection. To achieve the goal of minimizing the load of copper bump thermosonic Flip-Chip, the project, on the nano & atomic scale, will investigate microscopic properties of packaging materials(crystal dislocations, atomic diffusion, etc.) based on ultrasonic energy with different frequency & power in copper bump Flip-Chip technology and their high softening effects, as well as rheological behavior. It will also seek to understand the response and transformation between multiple forms of bonding energy and mechanisms on formation of micro-structures at nano-scale. Meanwhile relevant mathematical models will be established to interpret the mechanisms behind these phenomenon. Additionally, rheological properties of copper bump Flip-Chip interfaces, and the mechanism and conditions of generating micro-structures at bonding interfaces(such as solid solution and intermetallic compounds) will be explored. Furthermore, understanding the mechanism of the enhancement attributes with high-frequency ultrasound, physical nature of the load reduction, and analysis of laws of the coupling for multi-energy fields(such as ultrasonic, force and heat) will be conducted. Finally this project will provide a new high-performance copper bump thermosonic Flip-Chip interconnect technology.
芯片倒装已是电子封装发展的主流,金凸点热声倒装互连的电热性能比回流倒装高10倍,且工艺简单,绿色环保,已显示其独特的技术优势和前景。然而,铜具有更优的电热性能,比金高1倍,价格比金低5-10倍,铜凸点倒装互连将成为高性能电子封装发展的必然。.针对铜凸点倒装互连发展的技术瓶颈- - 铜的硬度比金大,需施加双倍载荷,引起芯片损伤、焊点破坏,导致互连失效,本项目以实现铜凸点热声倒装载荷最小化为目标,从纳米/原子尺度,探讨不同频率/功率超声能引发铜凸点倒装材料的微观特性(晶体位错、原子扩散等)及其高效软化流变行为,研究铜凸点倒装界面对多形态键合能的响应与转换以及纳尺度微结构的生成,建立相关的数理模型,查明铜凸点倒装界面流变及其生成固溶体、金属间化合物等微结构的机制与条件,弄清高频超声能强化机制和载荷减小的物理本质,并分析铜凸点倒装过程超声、力、热等多能场的耦合匹配,形成新型高性能铜凸点倒装互连技术。
芯片倒装已是电子封装发展的主流,金凸点热声倒装互连的电热性能比回流倒装高10倍,且工艺简单,绿色环保,已显示其独特的技术优势和前景。然而,铜具有更优的电热性能,比金高1倍,价格比金低5-10倍,铜凸点倒装互连将成为高性能电子封装发展的必然。. 针对铜凸点倒装互连发展的技术瓶颈——铜的硬度比金大,采用超声倒装技术,利用超声高效软化效应和激活界面材料位错的扩散机制,从纳米/原子尺度,阐明了研究原子扩散与金属化合物(IMC)的生长机理和超声能的传递转化,分析了铜凸点倒装过程超声、力、热等多能场的耦合匹配规律,查明了键合强度生成的超声能阈值条件以及过键合行为。发现铜凸点键合界面IMC生长困难,是由于Cu、Al原子半径相差较大且电负性接近,Cu-AlIMC形成所需的激活能较高,提出增加超声能和热能的新工艺方式,使界面IMC从离散的IMC纳米颗粒扩展至连续的IMC,并且发生IMC的转变,提高了键合强度和可键合性。发现增加芯片Al层厚度的方式,降低硬度,可改善铜键合过程的动力学条件,也可提高键合强度和可键合性。进行了倒装蘸胶过程多参数影响规律研究,提出了优化的蘸胶工艺,成功应用于倒装装备中。这些研究为铜凸点倒装键合提供机理理论和新工艺新技术。. 研究成果发表SCI论文20篇,其中包括IEEE Trans. Ind. Electro.(IF=6.383)、IEEE Trans. Ind. Inform.(IF=4.708)、Appl. Phys. Lett.(IF=3.142)、IEEE-ASME Trans. Mech. (IF=3.851)等国际知名期刊,2015年获得教育部科学技术进步奖一等奖1项。
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数据更新时间:2023-05-31
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