The concept of "verticalization for lateral high voltage device" has been proposed. With our innovative research on the fundamental theory and technology of this concept, the "silicon limit" of the conventional lateral high voltage device can be broken through the application of this concept. There are two innovations in this study. First, based on the concept of "verticalization for lateral high voltage device", a novel SOI lateral high voltage device structure with ultra-low specific on-resistance is proposed. This device features heavily doped P/N pillars parallel to the trench oxide layer, so a vertical super junction structure is formed in the drift region. The off-state BV is sustained by the vertical silicon layer under the source and drain. Because the dielectric layer can sustain a higher voltage than the silicon layer with the same length, the length of lateral drift region is dramatically reduced by the introduction of the dielectric trench. The technology of vertical super junction not only enhances electric field in the dielectric trench but also reduces the specific on-resistance effectively. The "silicon limit" of conventional high voltage device can be broken by using the proposed device structure. Second, a novel breakdown model for the proposed structure is proposed. By solving the 2-D Poisson's equation at the source side and drain side respectively, the potential and electric field distribution model of the novel SOI high voltage device is built and the optimal relationship among BV, Ron,sp and device structure parameters can be obtained to guide the design of the novel lateral high voltage device. The analytical model and numerical simulations are used to optimize the design of the device. Finally, it will be experimentally fabricated to obtain specific on-resistance lower than the "silicon limit" at different applied voltage levels. This study is of great significance, which can provide fundamental theory for application and advanced research.
提出"横向高压器件纵向化"概念,对其基础理论和技术进行创新研究,突破传统横向高压器件比导通电阻与击穿电压的"硅极限"关系。研究有两项创新:1.提出基于"横向高压器件纵向化"概念的超低比导通电阻SOI横向高压器件,通过在器件漂移区引入介质槽及纵向超结结构使得器件耐压由源漏两端纵向硅层共同承担。介质槽的引入,极大缩短了横向漂移区长度;纵向超结结构,不仅增强介质槽电场,也极大地降低了器件比导通电阻,二者共同作用使得新结构可打破传统高压器件的"硅极限"关系。2.提出新结构器件耐压模型,通过在源漏两端分区求解二维泊松方程,建立新型SOI高压器件电势和电场分布模型,获得器件耐压、比导通电阻和结构参数的优化关系,指导新结构器件设计。利用模型和数值仿真对器件进行优化设计,并进行实验研制,使其在不同电压应用级别都具有低于"硅极限"关系的比导通电阻。本研究系与国际水平同步的应用基础性和超前性研究,意义重大。
采用RESURF与SJ 技术的横向高压器件漂移区仍占据较大的表面尺寸,相关技术虽可改善器件比导通电阻和击穿电压的矛盾关系,但由于较大的漂移区尺寸并不能带来比导通电阻的革命性降低。槽栅技术已用于横向高压器件中,将器件的沟道区、积累区变成纵向,使得原来占据一定横向尺寸的器件沟道区和积累区的面积得以进一步降低,进而降低器件的比导通电阻。本项目提出了“横向高压器件纵向化”概念,通过将占据较大尺寸的漂移区进行纵向化,使得器件比导通电阻得以显著降低。对其基础理论和技术进行了创新研究,突破了传统横向高压器件比导通电阻与击穿电压的“硅极限”关系。主要研究内容有:1.提出多种基于“横向高压器件纵向化”概念的超低比导通电阻SOI横向高压器件,通过在器件漂移区引入介质槽及纵向超结结构使得器件耐压由源漏两端纵向硅层共同承担。介质槽的引入,极大缩短了横向漂移区长度;纵向超结结构,不仅增强介质槽电场,也极大地降低了器件比导通电阻,二者共同作用使得新结构可打破传统高压器件的“硅极限”关系。2.提出新结构器件耐压模型,通过在源漏两端分区求解二维泊松方程,建立了新型SOI高压器件电势和电场分布模型,包含均匀介质槽和非均匀介质槽两类结构,获得器件耐压、比导通电阻和结构参数的优化关系,可用于指导新结构器件的优化设计。本项目基于模型和数值模拟对器件进行了设计,获得均匀介质槽SOI LDMOS器件耐压684V时比导通电阻仅为48.5mΩ·cm2,非均匀介质槽SOI LDMOS器件耐压600-900V时比导通电阻仅为15.8-37.7 mΩ·cm2。基于该项目相关研究,在IEEE EDL、IEEE T-ED、APL等期刊发表SCI论文27篇,在本领域的一流国际会议IEEE ISPSD发表论文4篇,申请美国专利1项,中国发明专利63项,其中已授权28项,并于2016年获得四川省科学技术进步奖一等奖。本项目的科学意义在于:提出了“横向高压器件纵向化”的“概念、器件、模型”,围绕横向高压器件漂移区的纵向化,解决了传统横向高压器件中存在的比导通电阻和击穿电压的“硅极限”难题。
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数据更新时间:2023-05-31
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