基于三维纳米存储器的高维度计算研究

Hyperdimentional (HD) computing is easy to realize one-shot learning, and thus is one of the most important AI algorithms. Conventional computers face great challenges on processing HD vector computing. Therefore, it is highly required to develop new computing hardware for HP computing. Three dimensional (3D) nanoscale memories has great potential on enhancing the processing speed and energy efficiency of HD computing for several orders, due to their advantages such as high density, in-memory computing capability, massive parallel, etc. This project aims to solve the key scientific problems of HD computing based on 3D nanoscale memories (3D RRAM and 3D NAND Flash). This project also aims to develop 3D memory cells and array architecture which are suitable for HD computing, and will demonstrate parallel vector computing experimentally, proposing new solutions for improving the computing dimension and accuracy. This project will pave the way for designing novel AI chip with high energy efficiency, and provide accumulation of original intellectual property rights. This project aims to clarify three basic scientific issues: the origin of IV nonlinearity in RRAM and the relationship between array operation and nonlinearity; the mechanisms which limit the maximum dimension of parallel computing on 3D nanoscale memory array; the impact rules of reliability and uniformity of memory cell on the accuracy of HD computing.

高维度计算可以实现一次性学习，是一种重要的人工智能算法，传统计算机难以高效的处理高维度的向量计算，因此需要开发面向高维度计算的新型计算硬件。三维纳米存储器具有密度高、融合计算与存储、可大规模并行等优势，有潜力将高维度计算的处理速度和能效比提升多个数量级。本项目拟针对三维纳米存储器（阻变存储器和NAND闪存）处理高维度计算时面临的关键科学问题展开研究，研制出适合于高维度计算的三维存储器单元和阵列，实验演示出向量并行计算，提出提升计算维度和准确率的新方案，为高能效的人工智能芯片技术提供可行的解决方案和原始知识产权积累。本项目拟解决三个基础科学问题：阻变存储器电流非线性的起源及其与阵列操作的内在关联；限制三维纳米存储器阵列最大并行计算维度的物理机制；存储器件可靠性和一致性对高维度计算精度的影响规律。

随着人工智能领域的快速发展，类脑计算越来越受到人们的关注。高维度计算非常容易实现一次性学习，因此是一种非常重要的类脑计算算法。由于CMOS器件尺寸缩小面临越来越多的挑战，以及计算与存储分离引起的“冯诺依曼瓶颈”问题越来越突出，利用CPU/GPU做高维度计算已不能满足应用的需求，因此必须探索新的硬件载体，从而可以快速度、高能效的完成高维度向量的运算。本项目成功研制出国际首款基于阻变存储器的单片三维集成芯片，在速度和能耗上比传统的CPU/GPU硬件计算平台具有巨大优势，是构建未来高效智能硬件的重要一环。本项目在器件制造工艺、电路以及系统架构设计等多个层次有一系列的突破与创新，所研发的可行有效的阻变存储器三维集成技术，在国际上处于领先水平。在该项目的支持下，已发表论文37篇，申请专利8项。该项目的科研成果受到海内外的高度关注，在重要会议做特邀报告3次，发表论文多次被引用并长篇幅评述，被Nature Electronics作为研究亮点工作重点报道。