Owing to the superior material properties, Gallium Nitride-based power device is a promising candidate for the next-generation high-efficiency power switching devices. However, the wide application of GaN-based power electronics is limited by the lack of a single-chip normally-off device, which has a large gate voltage swing, a large gate bias safe operating range, and especially, a gate structure and simple gate driver like that of a Si MOSFET. Enhancement-mode (E-mode) GaN-based Metal-Insulator-Semiconductor Field Effect Transistor (MISFET) is an attractive method to break this limit. However, threshold voltage stability and gate reliability are the major concerns in developing the E-mode GaN MISFETs. Recently, LPCVD-SiNx was demonstrated as a promising gate dielectric for the GaN MISFETs, which has a high breakdown electric field, long time-dependent dielectric breakdown lifetime and low gate bias temperature instability (BTI). However, to further improve the threshold voltage stability and gate reliability of MISFETs to meet the application requirements, there are still some challenges, including defects in the silicon nitride dielectric layer, high-temperature reverse-bias stress (HTRB) instability, mechanisms of threshold voltage shifts and gate breakdown under AC stress, and so on. To address these challenges, this project proposes gate dielectric treatment techniques and double-channel structure to enhance the threshold stability and gate reliability of the E-mode LPCVD-SiNx MISFET. The degradation mechanisms under AC stress will also be investigated to promote the establishment of an accurate lifetime model that is critical to the GaN power MISFET technology.
GaN基功率器件基于优越的材料特性在新一代高效率功率开关器件的竞争中极具潜力。但其应用受限于缺少具有大栅压摆幅、大栅极偏置安全工作范围和类似于Si基MOSFET的栅极结构和驱动方式的单芯片常关型器件。常关型GaN基MISFET是突破这个限制的富有吸引力的解决方案,但面临着栅极可靠性和阈值稳定性的挑战。目前研究发现LPCVD-SiNx栅介质在MISFET结构中展现了高击穿电场、长经时击穿(TDDB)寿命和较小的栅极偏置温度不稳定性(BTI)等优异特性。但要进一步提高MISFET的阈值稳定性和栅极可靠性以满足应用需求,依然存在亟待解决的问题,包括栅介质的体缺陷、高温反向偏置应力(HTRB)下的栅极稳定性、AC应力下阈值漂移和栅极击穿机理等。为推动这些方面的研究,本项目针对常关型MISFET结构提出增强阈值稳定性和栅极可靠性的技术方案,并结合实际应用在交流电应力下研究栅极退化机理。
栅极可靠性和阈值电压稳定性是限制常关型GaN基功率器件应用的瓶颈难题。本项目旨在揭示高压应力下器件阈值电压漂移机理,建立栅极经时击穿寿命预测模型,掌握降低界面缺陷态和实现高质量介质层的技术,实现具有高栅极可靠性和阈值稳定性的GaN基常关型器件。本项目完成了针对常关型GaN基器件MIS结构界面增强和缺陷态抑制技术开发,攻克了低损伤凹栅刻蚀、栅介质后退火处理、“氧化-重构”GaON单晶层、欧姆接触等关键工艺,完成了工艺整合和器件研制,所研制的常关型GaN基功率器件12.9 V下栅介质寿命超过10年,高压长时间应力下阈值电压漂移小于0.3 V。此外,本项目深入研究了高压反向偏置应力下器件栅极可靠性和阈值电压漂移的机理,揭示了空穴注入对器件可靠性的影响机制,为实现高阈值稳定性和高栅极可靠性的GaN基功率器件提供技术方案和研究积累,对推动GaN基功率器件发展具有重要意义。.项目实施期间共发表高水平论文20篇,项目负责人均为第一或通讯作者,其中高水平国际期刊SCI论文13篇、器件领域国际顶级会议IEDM论文1篇、功率半导体领域国际顶级会议ISPSD论文3篇。项目负责人受邀为国际产业界杂志Compound Semiconductor撰写特邀专题文章1篇,为国际会议做邀请报告3次;申请发明专利3项,其中已获授权1项;培养博士研究生3名,硕士研究生2名(其中1名转为博士研究生继续攻读学位),超任务完成项目预期目标。
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数据更新时间:2023-05-31
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