基于硅穿孔电感的3D SoC芯片片上电压调整模块的优化设计

During post-Moore era, 3D SoC is one of the most important techniques to guarantee the continuing growth of chip integration density. One of the key aspects to ensure mass production and success of 3D SoC products is the application of low power and high performance power delivery solution. However, traditional power delivery solutions by employing on-board voltage regulator suffer from high cost due to the number of on-chip power domains as well as SoC complexity, while on the other hand, mainstream on-chip integrated voltage regulator (e.g. the 4th generation CORE microprocessor) suffers from poor scalability of on-package Air-Core Inductor (ACI) as well as being limited to 3D architecture. Thus, both solutions fail to meet the requirement for 3D SoC chips and cannot be directly applied. In this proposal, we utilize redundant on-chip through-silicon vias (TSV) to design on-chip inductor, and then propose a power delivery solution using TSV-inductor based on-chip integrated voltage regulator and fully taking advantage of 3D architecture. This solution is a novel research domain in 3D SoC design and fulfills the research gap across the world. Major breakthroughs of the proposal include: （1） The proposed integrated voltage regulator is fully implemented using on-chip resources with better scalability and compatibility; （2） Compared with traditional planar spiral inductor and ACI, the optimized TSV-inductor consumes much less area while delivering comparable performance; （3） The proposed voltage regulator system, featuring high integration and low cost, fully takes advantage of 3D architecture and meets the power consumption demands for most SoC applications through optimizing TSV-inductor process/architecture and circuit design.

在后摩尔时代，3D SoC是延续芯片集成度增长的一个重要研究方向。其产业化的一大关键在于能否应用低成本高效率的电源方案。然而，传统的基于电路板电压调节器（VR）的电源方案受限于SoC多个电源域及复杂度带来的高成本问题，主流的片上集成VR方案（如第四代酷睿芯片）则受限于封装上空芯线圈电感的尺寸及3D架构，均难以直接应用于先进工艺下的3D SoC芯片。本课题利用3D芯片片上冗余硅穿孔来设计电感，由此提出基于硅穿孔电感并充分利用3D架构的片上集成VR电源方案。该方案对3D芯片设计提出一个全新方向，填补了国内外相关研究的空白，其优势在于：（1）集成VR完全通过片上资源实现，具有良好的可扩展性及兼容性；（2）相比平面螺旋电感及空芯线圈电感，优化后的硅穿孔电感大大减少占用面积；（3）整个系统充分利用3D架构，通过优化硅穿孔工艺及电路设计，可满足绝大部分SoC芯片供电需求，具有高集成度、低成本的优点。

在后摩尔时代，3D SoC是延续芯片集成度增长的一个重要研究方向。其产业化的一大关键在于能否应用低成本高效率的电源方案。然而，传统的基于电路板电压调节器（VR）的电源方案受限于SoC多个电源域及复杂度带来的高成本问题，主流的片上集成VR方案（如第四代酷睿芯片）则受限于封装上空芯线圈电感的尺寸及3D架构，均难以直接应用于先进工艺下的3D SoC芯片。本课题利用3D芯片片上冗余硅穿孔来设计电感，由此提出基于硅穿孔电感并充分利用3D架构的片上集成VR电源方案。该项目在实施期间重点研究了硅穿孔电感自工艺到架构的系统化设计方法，然后在此基础上探索了硅穿孔电感电源信号完整性评估方法及指导性准则以及硅穿孔电感仿真优化工具，最后提出了基于硅穿孔电感的集成VR原型及优化设计方法。本课题的研究将有力地推动硅穿孔电感在集成VR设计中的应用，从而实现高集成度、低成本的VR设计。