基于介电弛豫时间模型的硅基GaN功率开关器件动态导通电阻特性及控制技术研究

Due to the unique material properties and the capability for massive production, GaN HEMT on silicon substrate is believed to be the candidate of the next generation high efficiency and high frequency power switches. In this project, we would study the degradation phenomenon of the dynamic on-resistance in GaN HEMT on silicon substrate, try to reveal the underlying device physics, establishing the degradation model based on dielectric relaxation and develop the device technology for fabricating HEMT devices with high dynamic power figure of merit. The main research points include: the behavior of the trap states in the buffer layer of GaN HEMT on silicon substrate with large lattice mismatch, the degradation rule of the dynamic on-resistance, low density p-type doping of the buffer and the effect on the dynamic on-resistance, novel HEMT structure on silicon substrate with grounded buffer, etc. The fabricated high performance GaN power switch on silicon substrate is expected to deliver an off-state breakdown voltage larger 1 kV, a static specific on-resistance smaller than 1.2 milliohm centimeter square, a small increase of the dynamic on-resistance of about 50% under 600 V operation voltage, which would further confirm the accuracy of the established degradation model of the dynamic on-resistance in GaN power switch device and enhance the understanding of the material and device physics of wide band gap semiconductors.

由于优良的电学特性和具备大规模生产潜力，硅基GaN HEMT被认为是下一代高效、高频功率开关最有竞争力的替代者。本申请项目以研究硅基GaN HEMT动态导通电阻退化这一限制器件实用化的瓶颈问题为切入点，以弄清相关器件物理、发展具有高动态功率因数的硅基GaN功率开关器件制备技术为目标，创新提出开展基于介电弛豫时间模型的动态导通电阻特性及控制技术研究。主要研究内容包括大失配衬底上GaN HEMT缓冲层中陷阱态的物理行为、HEMT器件动态导通电阻退化的规律、缓冲层的低浓度p型掺杂对动态导通电阻的影响、缓冲层接地的新型硅基GaN HEMT功率开关器件等。研制出高性能硅基GaN功率开关器件，耐压大于1 kV、静态比导通电阻小于1.2毫欧厘米平方、600 V工作电压下动态导通电阻的上升小于50%，验证所建立的GaN HEMT动态导通电阻退化模型的正确性，加深对宽禁带半导体材料物理和器件物理的理解。

基于宽禁带GaN材料的电子器件，特别是AlGaN/GaN高迁移率晶体管(HEMT)具有高效率、高开关频率的优势，正成为下一代功率管理系统中最具竞争力的开关器件。GaN HEMT自身的结构特点要求在外延生长过程中引入高阻的缓冲层，高压、高电场作用下其对沟道中载流子的捕获是引起器件动态导通电阻增加的原因之一。项目针对高阻缓冲层中载流子输运及陷阱态的行为开展了研究工作，发现缓冲层的漏电遵循空间电荷限制电流的物理规律，介电弛豫时间长导致缓冲层中电场分布不均匀，空间电荷区也相应变化。研究了掺C缓冲层的GaN HEMT在变温下的动态导通电阻增加行为，发现低温可以抑制动态导通电阻增加，获得陷阱态捕获电子的激活能为0.36eV，而发射电子的激活能为0.2eV，说明陷阱态的载流子捕获与发射存在晶格弛豫过程。为了加快缓冲层中负空间电荷区的恢复，提出采用源极接地的缓冲层，避免开关过程中的浮置状态；同时源极附近p型区域中的空穴可以在高电场作用下注入到缓冲层中，加快负空间电荷区的恢复，从而减小动态导通电阻的增加；模拟计算表明与普通结构相比，采用p型接地缓冲层器件动态导通电阻的增加得到有效抑制。在缓冲层引起动态导通电阻增加的基础上，进一步研究了AlGaN/GaN异质结构中界面态对动态导通电阻增加的影响。提出采用基于MOCVD原位生长的SiN与LPCVD生长的SiN形成复合栅介质，从而减小MIS结构中的界面态，所制备的功率开关器件在600V静态偏置下的动态导通电阻增加只有34%。以上研究结果为进一步改善硅基GaN功率开关器件的性能、减小导通损耗提供了物理依据，对新型材料结构及器件工艺的开发具有一定的借鉴意义。