多电平闪存系统的信道容量估计和信号检测算法研究

The multilevel-flash-memory-based storage is one of the main next-generation digital storage systems. However, researches on the information theory of the multilevel flash memory system have remained to be developed further. This project focuses on two information-theoretic problems of the multilevel flash memory system. The first problem is on the channel capacity. To determine the channel capacity, we model the multilevel flash memory system as a two-dimensional (2D) finite output memory and state channel (FOMASC) with input-dependent noises and interferences. Then, we construct proper 2D Markov sources. By source optimization, the channel capacity can be estimated numerically and the capacity-approaching 2D source can be delivered. The second problem is on the signal detection. We propose two methods to detect the observed 2D channel outputs. First, based on the one-dimensional (1D) optimal detection, by interleaving the 1D horizontal detection and 1D vertical detection, we design an iterative detection algorithm. Second, based on the properties of the 2D Markov source and the 2D FOMASC, we build a new Trellis for the system and then design a Viterbi-like detection algorithm. The above problems are two of the latest critical problems in the data storage system. Based on our previous works, we will hopefully achieve some valuable results both on the theoretics and the practice, which will support the design and implementation of the next-generation digital storage system.

基于多电平闪存的存储系统是下一代数字存储系统的主流之一。然而，多电平闪存系统的信息论研究还在起步发展阶段。本项目拟从信息论的角度出发，研究多电平闪存系统的两个基本问题。1）信道容量：基于噪声和干扰依赖于信道输入以及信道具有有限长输出记忆的特点，建立系统的二维有限输出记忆和状态信道（FOMASC）数学模型；通过构造二维Markov信源和信源优化估计系统的信道容量和逼近信道容量的二维信源；2）信号检测：基于一维最优检测算法，利用水平和垂直交织的思想设计二维信号的迭代检测算法；结合二维Markov信源和二维FOMASC信道的特点，提炼新Trellis图，设计基于Trellis图的 Viterbi-类最优检测算法。本项目选题取自数字存储系统面临的新问题，在已有的工作基础上进一步深入研究，有望得到兼具理论意义和实用价值的成果,为下一代数字存储系统的设计与实现提供理论依据和技术支持。

基于多电平闪存的存储系统已经成为存储的主流之一。然而，多电平闪存系统的信息论研究还在初步发展阶段，这使得多电平闪存的设计和应用受限。本项目从Shannon信息论的角度出发，对多电平闪存系统展开研究。首先，分析多电平闪存的噪声和干扰特征，提出了一个噪声和区间干扰均依赖于信道输入的一般二维有限输出记忆和状态的信道（FOMASC）模型。其次，给出了一般FOMASC模型的信道容量表示，并就其一个简化模型的信道容量做了数值估计和分析。第三，利用Viterbi-MAP最优序列检测方案设计了特定场景下的信号检测算法，包括一个一维最优符号检测算法和一个二维次优检测算法。第四，学习和分析了基于阵列多元LDPC码的结构特征，为将来设计适用于多电平闪存系统的高效纠错编译码方案提供思路。这些研究不仅丰富了Shannon信息论的内容，也为数据存储系统的设计与实现提供理论指导和技术支持。